(1) Field of the Invention
This invention relates to a CMOS image sensor for getting images by outputting in order image signals sensed in each of pixel areas arranged like a matrix on the basis of X-Y addressing and, more particularly, to a CMOS image sensor which can reduce kTC noise.
(2) Description of the Related Art
With the spread of digital still-image cameras and digital video cameras, the addition of a camera function to cellular telephones, and the like, a demand for solid imaging devices has risen in recent years. At present charge coupled devices (CCDs) have spread most widely as solid imaging devices. However, these CCDs have the drawbacks of the need for a plurality of power supply circuits, a high driving voltage, and high power consumption. Therefore, attention has recently been riveted to CMOS image sensors that can be produced by the process for producing complementary metal-oxide semiconductors (CMOSes), which can operate at a low voltage, which consume only a small amount of power, and the unit cost of the production of which is low.
In CMOS image sensors, pixel circuits each of which gets an image corresponding to one pixel are arranged like a matrix. They output image signals corresponding to an entire image by selecting in order output from each pixel circuit with a vertical scanning shift register and horizontal scanning shift register.
FIG. 9 is a view showing an example of the structure of a pixel circuit and a circuit around it in a conventional CMOS image sensor.
A pixel circuit 50 shown in FIG. 9 includes a photoelectric conversion element D51, being a photodiode, a photogate, or the like, and has an active pixel sensor (APS) structure in which a reset transistor M51, amplifying transistor M52, and row selection transistor M53 each formed by, for example, an n-channel MOS field-effect transistor (MOSFET) are located. Moreover, an inverter circuit 60 including a p-channel MOS transistor (pMOS transistor) M61 and n-channel MOS transistor (nMOS transistor) M62 is connected to a gate of the reset transistor M51.
The anode side of the photoelectric conversion element D51 is grounded and the cathode side is connected to a source of the reset transistor M51 and a gate of the amplifying transistor M52. A drain of the reset transistor M51 and a drain of the amplifying transistor M52 are connected to a power supply line L53 where reset voltage VR is supplied. A gate of the reset transistor M51 is connected via a reset signal line L51 to an output electrode on the inverter circuit 60 and is supplied with a reset signal RST.
A source of the amplifying transistor M52 is connected to a drain of the row selection transistor M53. A gate of the row selection transistor M53 is connected to a row selection signal line L52 where a row selection signal SLCT for selecting the pixel circuits 50 in a row direction is supplied. A source of the row selection transistor M53 is connected to a column selection signal line L54 for selecting the pixel circuits 50 in a column direction.
In the inverter circuit 60, power supply voltage VDD is supplied to a source of the pMOS transistor M61 and a source of the nMOS transistor M62 is grounded. A reset control signal Vrst is input to gate of the pMOS transistor M61 and nMOS transistor M62. Drain of the pMOS transistor M61 and nMOS transistor M62 are connected to the reset signal line L51 and output a reset signal RST.
Now, operation in the conventional pixel circuit 50 will be described in brief.
When a low-level reset control signal Vrst is input to the inverter circuit 60, the pMOS transistor M61 goes into an ON state, the nMOS transistor M62 goes into an OFF state, and a high-level reset signal RST is input to the gate of the reset transistor M51. As a result, the reset transistor M51 goes into an ON state and the photoelectric conversion element D51 is charged by reset voltage VR.
Next, when the reset control signal Vrst goes into a high-level state, the reset signal RST goes into a low-level state. When light strikes it in this state of things, the photoelectric conversion element D51 begins to discharge and its potential drops from the reset voltage VR. The amplifying transistor M52 functions as a source follower amplifier and amplifies the voltage of the cathode of the photoelectric conversion element D51. After a predetermined period of time elapsed, a row selection signal SLCT is input to the gate of the row selection transistor M53. When the row selection transistor M53 goes into an ON state, the voltage of the source of the amplifying transistor M52 is gotten via the column selection signal line L54 as signal voltage.
The column selection signal line L54 is connected via an amplifier/noise cancel circuit (not shown) to, for example, a drain of a column selection transistor (not shown) . In a CMOS image sensor, each of the pixel circuits 50 arranged in a horizontal direction is selected by a row selection signal SLCT, the column selection transistors each connected to the column selection signal line L54 are put in order into an ON state, and image signals corresponding to one pixel are output in order.
With the pixel circuits 50 having the above structure, however, kTC noise produced at the time of the photoelectric conversion element D51 being reset will degrade the S/N ratio of an output image signal. When the reset transistor M51 is in the ON state and the photoelectric conversion element D51 has been reset to the initial potential, kTC noise will be produced. This kTC noise is random thermal noise and is expressed by vkTC=(kT/C)1/2 where k is the Boltzmann's constant, T is absolute temperature, and C is the total capacitance of the photoelectric conversion element D51.
This kTC noise is produced at random, so it is comparatively difficult to remove the kTC noise from image signals. There are many cases where high-frequency kTC noise cannot be removed.
For example, it has been suggested that kTC noise should be reduced by keeping the voltage of the cathode of the photoelectric conversion element D51 at reset time constant by the use of a differential amplifier. This method can reduce kTC noise components in a frequency band where this differential amplifier operates, but it cannot reduce kTC noise components at frequencies higher than that frequency band.
Moreover, there are many cases where a circuit for reducing kTC noise is comparatively large-scale. If such a circuit is used and component elements and wirings are formed in pixel areas, a fill factor for a light receiving section will lower.